1. Field of the Invention
The present invention relates to an active matrix substrate and a liquid crystal display device, and more particularly, to a structure of a terminal area located outside a display area of an active matrix substrate and a liquid crystal display device including the active matrix substrate.
2. Description of the Related Art
Liquid crystal display devices have advantages such as a thin thickness, a lightweight, and low power consumption and have been widely used as display devices of audio/video (AV) devices, Office Automation (OA) devices, and other such devices. A liquid crystal display device has a structure in which a liquid crystal layer is sandwiched between an active matrix substrate and a counter substrate. The active matrix substrate is a substrate on which thin film transistors (TFTs) and pixel electrodes are formed. The counter substrate is a substrate in which color filters, a black matrix, and the like are formed. The liquid crystal display device displays information by controlling orientation directions of liquid crystal molecules with electric fields generated by electrodes provided on at least one of the substrates. Hereinafter, the active matrix substrate is also referred to as a “TFT substrate”.
As shown in FIG. 8, a TFT substrate 2 includes a display area 4a in which a plurality of scanning lines 12 and a plurality of signal lines 11 are formed. The scanning lines 12 are substantially orthogonal to the signal lines 11. Each area surrounded by adjacent two of the scanning lines 12 and adjacent two of the signal lines 11 includes a pixel electrode 13 and a TFT 14 which are formed thereon. Each TFT is connected with one of the scanning lines and one of the signal lines. The scanning lines 12 and the signal lines 11 are connected with extraction wirings 7a formed on a terminal area 4c (located outside the display area 4a). A connection terminal 8a on which a chip-on-glass (COG) chip is mounted and a testing terminal 9 for making contact with a probe of a prober are provided on each of the extraction wirings 7a. 
FIGS. 9A and 9B are schematic views showing a structure which includes an extraction wiring and a connection terminal and a testing terminal which are formed thereon. FIG. 9A is a plan view and FIG. 9B is a cross sectional view taken along an X-X line shown in FIG. 9A. In the case of a reverse stagger liquid crystal display device, as shown in FIGS. 9A and 9B, a metallic film 16 serving as the extraction wiring is formed on a transparent insulator substrate 15. The metallic film 16 is covered with an insulator film 17. The insulator film 17 includes a first contact hole 10a formed in a position corresponding to the connection terminal 8a and a second contact hole 10b formed in a position corresponding to the testing terminal 9. The connection terminal 8a and the testing terminal 9 which are made of, for example, an indium tin oxide (ITO) film 18 are formed in the positions in which the contact holes are formed.
The above-mentioned terminal structure is disclosed in US 2004/0239857 A1 (reference-1). For example, the reference-1 discloses that rectangular-shaped contact holes are provided in rectangular-shaped terminals as shown in FIGS. 9A and 9B.
The TFT substrate 2 is bonded to a counter substrate 3 by a seal member provided around the display area 4a and a liquid crystal layer is enclosed between the substrates. As a result, the display area 4a of the TFT substrate 2 is not influenced by external environments. However, the terminal area 4c located outside the display area 4a is exposed to an outside as a matter of convenience of COG chip mounting and operation check using a prober. Therefore, respective constituent, members of the terminal area 4c, that is, the connection terminal 8a, the testing terminal 9, the extraction wiring 7a, and the like may be easily influenced by the external environments. The influence of the external environments on the connection terminal 8a is relatively small because the connection terminal 8a is covered with a bump by chip mounting. On the other hand, the testing terminal 9 is easily influenced by the external environments because the testing terminal 9 is being exposed even after chip mounting.
As shown in FIG. 9B, the insulator film 17 is formed on the metallic film 16 serving as the extraction wiring 7a. The first contact hole 10a and the second contact hole 10b which are provided in the insulator film 17 are filled with the ITO film 18. The ITO film 18 serves as the connection terminal 8a and the testing terminal 9. Therefore, at first glance, it appears that the metallic film 16 is not exposed in the structure shown in FIG. 9B. However, a portion of the metallic film 16 which is exposed may be actually caused near the opening ends of the first contact hole 10a and the second contact hole 10b. As a result, the metallic film 16 may be exposed to external air and corroded.
This cause will be described with reference to FIGS. 10A, 10B, 10C, 11A, and 11B. FIGS. 10A, 10B, and 10C are sectional views showing steps of producing the terminal area 4c. FIGS. 11A and 11B are enlarged views showing a region surrounded by a broken circle 31 shown in FIG. 10C.
Steps of producing the terminal area 4c will be briefly described. First, the metallic film 16 is formed on the transparent insulator substrate 15 made of glass, plastic, or the like (FIG. 10A). The metallic film 16 is patterned to form the extraction wirings 7a together with the scanning lines and the signal lines.
Next, the insulator film 17 made of silicon oxide, silicon nitride, or the like is formed. A mask pattern is formed on the insulator film 17. Exposed potions of the insulator film 17 are etched by a wet etching method or a dry etching method to form the first contact hole 10a and the second contact hole 10b (FIG. 10B).
Next, the ITO film 18 is formed. The ITO film 18 is patterned to form the connection terminal 8a covering the first contact hole 10a and the testing terminal 9 covering the second contact hole 10b (FIG. 10C).
At this time, when the ITO film 18 is deposited in the first contact hole 10a and the second contact hole 10b by a physical method such as a sputtering method, a gap 19a in which the ITO film 18 is not deposited may be caused near the opening ends of the contact holes as shown in FIG. 11A. This is because a side wall of the first contact hole 10a and a side wall of the second contact hole 10b are substantially vertically formed.
As shown in FIG. 11B, when the contact between the ITO film 18 and the insulator film 17 is poor, a gap 19b may be caused between the ITO film 18 and the, insulator film 17. In particular, an area of the testing terminal 9 is larger than an area of the connection terminal 8a, so an area of the second contact hole 10b becomes larger than an area of the first contact hole 10a. Therefore, a circumference of the second contact hole 10b becomes longer than a circumference of the first contact hole 10a, so that it is more likely to cause the gap 19b with the testing terminal 9 than to cause the gap 19b with the connection terminal 8a. 
When moisture or the like which is included in external air penetrates from the gap 19a or 19b, the metallic film 16 of the extraction wiring 7a is corroded. In particular, when the metallic film 16 is made of base metal such as Al, the corrosion proceeds by battery reaction or the like. As a result, a resistance value between the extraction wiring 7a and the connection terminal 8a and a resistance value between the extraction wiring 7a and the testing terminal 9 increase. At worst, it is likely to break the extraction wiring. This phenomenon reduces the reliability of the liquid crystal display device and shortens the life thereof.
In addition, the reference-1 describes that another metallic film is formed between the metallic film of the lower layer and the ITO film of the upper layer to suppress the exposure of the metallic film of the lower layer. However, this method complicates a manufacturing process and thus hinders a reduction in price of the liquid crystal display device.